Electronic components such as transistors, MEMs, LEDs, diodes, or more complex integrated circuits are manufactured from semiconductor wafers using chemical processing techniques. Packaging of the devices is done by encapsulating the devices with protective covers while providing for physical connections between the device and the environment. Examples of physical connections include;                Electrical connection to provide current or voltage for device operation        Thermal connection to dissipate heat from the device        Optical connection to extract light from devices such as light emitting diodes, or to provide light for devices such as image sensors        To provide a physical connection to the device for measurement of external physical parameters such as pressure, temperature, humidity, acceleration, rotation, ambient light, etc.        
State of art methods to package devices include                Connecting the device to metal lead frames and over molding with a polymer        Connecting the device to a polymer, glass fiber or ceramic substrate and over molding with a polymer        Chip scale packaging where the device electrical connections are extended using an overlay of deposited metal and protective polymer coating        
These methods suffer from high production cost, large form factor and poor dissipation of the heat generated during the operation of the device. The heat dissipation of electronic devices is a major impediment in next generation electronics. As the density of components increases, the energy density increases. To prevent component failures enhanced heat dissipation is required.
Patent Cooperation Treaty publication WO/2014/064541 and WO/2011/033516 to the same assignee disclose a process for wafer packaging method of LEDs. The process described in the publications is based on a “via last” process flow. The via in the bottom wafer, which provides a route for the electrical contact from one face of the bottom wafer, to the other face of the bottom wafer, is done after the attachment of the LED and in the last stages of the wafer level packaging process. The “via last” process flow requires complex processing of the bottom wafer which can increase the cost of the package and reduce yield and applications. An alternative method described below is a “via first” process flow. The “via first” process flow offers several advantages in addition to simplifying the process flow as it can also enable integration of electronics in the packaging procedure.